Practical limitations of state-of-the-art passive printed circuit board power delivery networks for high performance compute systems

Chad M. Smutzer, Barry K. Gilbert, Erik S. Daniel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Trends in high performance computing (HPC) systems point to ever-decreasing power delivery network (PDN) impedances. While there is no particular theoretical minimum impedance, practical limitations present boundaries which will be difficult to exceed. In this paper, we explore specifically the practical limitations of the printed circuit board (PCB) portion of the PDN, concluding that useful implementations will be limited to on the order of 0.2 mOhms below 1 MHz, rising to roughly 0.4 mOhms at 10 MHz, and increasing with frequency thereafter.

Original languageEnglish (US)
Title of host publication2013 17th IEEE Workshop on Signal and Power Integrity, SPI 2013
DOIs
StatePublished - Aug 20 2013
Event2013 17th IEEE Workshop on Signal and Power Integrity, SPI 2013 - Paris, France
Duration: May 12 2013May 15 2013

Publication series

Name2013 17th IEEE Workshop on Signal and Power Integrity, SPI 2013

Other

Other2013 17th IEEE Workshop on Signal and Power Integrity, SPI 2013
CountryFrance
CityParis
Period5/12/135/15/13

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ASJC Scopus subject areas

  • Signal Processing

Cite this

Smutzer, C. M., Gilbert, B. K., & Daniel, E. S. (2013). Practical limitations of state-of-the-art passive printed circuit board power delivery networks for high performance compute systems. In 2013 17th IEEE Workshop on Signal and Power Integrity, SPI 2013 [6558326] (2013 17th IEEE Workshop on Signal and Power Integrity, SPI 2013). https://doi.org/10.1109/SaPIW.2013.6558326