@article{ea4fb015880a4d8bbb1e1ac42dfd4181,
title = "High-speed, low-power digital and analog circuits implemented in IBM SiGe BiCMOS technology",
abstract = "Under the auspices of Defense Advanced Research Project Agency's Microsystems Technology Office (DARPA/MTO) Low Power Electronics Program, the Mayo Foundation Special Purpose Processor Development Group is exploring ways to reduce circuit power consumption, while maintaining or increasing functionality, for existing military systems. Applications presently being studied include all-digital radar receivers, electronic warfare receivers, and other types of digital signal processors. One of the integrated circuit technologies currently under investigation to support such military systems is the IBM Corporation silicon germanium (SiGe) BiCMOS process. In this paper, design methodology, simulations and test results from demonstration circuits developed for these applications and implemented in the IBM SiGe BiCMOS 5HP (50 GHz fT HBTs with 0.5 um CMOS) and 7HP (120 GHz fT HBTs with 0.18 um CMOS) technologies will be presented.",
keywords = "BiCMOS, CMOS, Current mode logic (CML), Demultiplexer, Differential amplifier, Heterojunction bipolar transistor (HBT), Low power, Low voltage differential signalling (LVDS), Multiplexer, Radiation, Silicon Germanium (SiGe), Single event upset (SEU)",
author = "Fritz, {Karl E.} and Randall, {Barbara A.} and Fokken, {Gregg J.} and Degerstrom, {Michael J.} and Lorsung, {Michael J.} and Prairie, {Jason F.} and Amundsen, {Eric L.H.} and Schreiber, {Shaun M.} and Gilbert, {Barry K.} and Greenberg, {David R.} and Alvin Joseph",
note = "Funding Information: This work was supported in part by the Microsystems Technology Office of the Defense Advanced Research Projects Agency (DARPA/MTO), through Contracts N66001-94-C-0051 and N66001-99-C-8605 from SPAWAR Systems Center San Diego. The authors wish to thank Drs. D. Radack and J. Murphy, DARPA/MTO, and Dr. C. Hanson, SPAWAR Code 8505, for administrative support and many helpful discussions; and S. Richardson, D. Jensen, E. Doherty, T. Funk, and L. Stewart, Mayo Foundation, for assistance in preparation of text and figures. Funding Information: Under the auspices of Defense Advanced Research Project Agency's Microsystems Technology Office (DARPA/MTO) Low Power Electronics Program, the Mayo Foundation Special Purpose Processor Development Group is exploring ways to reduce circuit power consumption, while maintaining or increasing functionality, for existing military systems. Applications presently being studied include all-digital radar receivers, electronic warfare receivers, and other types of digital signal processors. One of the integrated circuit technologies currently under investigation to support such military systems is the IBM Corporation silicon germanium (SiGe) BiCMOS process. In this paper, design methodology, simulations and test results from demonstration circuits developed for these applications and implemented in the IBM SiGe BiCMOS 5HP (50 GHz fT HBTs with 0.5 urn CMOS) and 7HP (120 GHz fT HBTs with 0.18 um CMOS) technologies will be presented.",
year = "2003",
month = mar,
doi = "10.1142/S0129156403001582",
language = "English (US)",
volume = "13",
pages = "221--237",
journal = "International Journal of High Speed Electronics and Systems",
issn = "0129-1564",
publisher = "World Scientific Publishing Co. Pte Ltd",
number = "1",
}