High-speed, low-power digital and analog circuits implemented in IBM SiGe BiCMOS technology

Karl E. Fritz, Barbara A. Randall, Gregg J. Fokken, Michael J. Degerstrom, Michael J. Lorsung, Jason F. Prairie, Eric L.H. Amundsen, Shaun M. Schreiber, Barry K. Gilbert, David R. Greenberg, Alvin Joseph

Research output: Contribution to journalArticlepeer-review

Abstract

Under the auspices of Defense Advanced Research Project Agency's Microsystems Technology Office (DARPA/MTO) Low Power Electronics Program, the Mayo Foundation Special Purpose Processor Development Group is exploring ways to reduce circuit power consumption, while maintaining or increasing functionality, for existing military systems. Applications presently being studied include all-digital radar receivers, electronic warfare receivers, and other types of digital signal processors. One of the integrated circuit technologies currently under investigation to support such military systems is the IBM Corporation silicon germanium (SiGe) BiCMOS process. In this paper, design methodology, simulations and test results from demonstration circuits developed for these applications and implemented in the IBM SiGe BiCMOS 5HP (50 GHz fT HBTs with 0.5 um CMOS) and 7HP (120 GHz fT HBTs with 0.18 um CMOS) technologies will be presented.

Original languageEnglish (US)
Pages (from-to)221-237
Number of pages17
JournalInternational Journal of High Speed Electronics and Systems
Volume13
Issue number1
DOIs
StatePublished - Mar 1 2003

Keywords

  • BiCMOS
  • CMOS
  • Current mode logic (CML)
  • Demultiplexer
  • Differential amplifier
  • Heterojunction bipolar transistor (HBT)
  • Low power
  • Low voltage differential signalling (LVDS)
  • Multiplexer
  • Radiation
  • Silicon Germanium (SiGe)
  • Single event upset (SEU)

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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