DESIGN OF PROTOTYPE DIGITAL PROCESSORS EMPLOYING SUBNANOSECOND EMITTER COUPLED LOGIC AND RAPID FABRICATION TECHNIQUES.

Barry Kent Gilbert, Loren M. Krueger, Rodney D. Beistad

Research output: Chapter in Book/Report/Conference proceedingChapter

5 Citations (Scopus)

Abstract

A protocol is developed for the design of a single-copy high throughput processor system using subnanoscond emitter coupled logic (ECL). The system is the part of an X-ray computer-assisted tomography (CT) machine which will allow diagnosis of disorders of the heart, lungs, an their associated circulation with a high degree of precision.

Original languageEnglish (US)
Title of host publicationIEEE Transactions on Components, Hybrids and Manufacturing Technology
Pages125-134
Number of pages10
VolumeCHMT-3
Edition1
StatePublished - Mar 1980

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Tomography
Throughput
Fabrication
X rays

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Gilbert, B. K., Krueger, L. M., & Beistad, R. D. (1980). DESIGN OF PROTOTYPE DIGITAL PROCESSORS EMPLOYING SUBNANOSECOND EMITTER COUPLED LOGIC AND RAPID FABRICATION TECHNIQUES. In IEEE Transactions on Components, Hybrids and Manufacturing Technology (1 ed., Vol. CHMT-3, pp. 125-134)

DESIGN OF PROTOTYPE DIGITAL PROCESSORS EMPLOYING SUBNANOSECOND EMITTER COUPLED LOGIC AND RAPID FABRICATION TECHNIQUES. / Gilbert, Barry Kent; Krueger, Loren M.; Beistad, Rodney D.

IEEE Transactions on Components, Hybrids and Manufacturing Technology. Vol. CHMT-3 1. ed. 1980. p. 125-134.

Research output: Chapter in Book/Report/Conference proceedingChapter

Gilbert, BK, Krueger, LM & Beistad, RD 1980, DESIGN OF PROTOTYPE DIGITAL PROCESSORS EMPLOYING SUBNANOSECOND EMITTER COUPLED LOGIC AND RAPID FABRICATION TECHNIQUES. in IEEE Transactions on Components, Hybrids and Manufacturing Technology. 1 edn, vol. CHMT-3, pp. 125-134.
Gilbert BK, Krueger LM, Beistad RD. DESIGN OF PROTOTYPE DIGITAL PROCESSORS EMPLOYING SUBNANOSECOND EMITTER COUPLED LOGIC AND RAPID FABRICATION TECHNIQUES. In IEEE Transactions on Components, Hybrids and Manufacturing Technology. 1 ed. Vol. CHMT-3. 1980. p. 125-134
Gilbert, Barry Kent ; Krueger, Loren M. ; Beistad, Rodney D. / DESIGN OF PROTOTYPE DIGITAL PROCESSORS EMPLOYING SUBNANOSECOND EMITTER COUPLED LOGIC AND RAPID FABRICATION TECHNIQUES. IEEE Transactions on Components, Hybrids and Manufacturing Technology. Vol. CHMT-3 1. ed. 1980. pp. 125-134
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