Supersystems: Technology and architecture

Earl E. Swartzlander, Barry K. Gilbert

Research output: Contribution to journalArticle

3 Scopus citations

Abstract

Supersystems are general purpose computers achieving throughputs in excess of 1 billion instructions per second (BIPS). As such, supersystems present formidable design challenges in the areas of technology and architecture. This paper examines three of the classical design options: high-speed monoprocessors, array processors, and distributed processors. The latter approach appears most desirable for supersystems, but will require improved interconnection networks. This paper presents metrics applicable to interconnection network performance, cost, and overall quality estimation. Examination of six well-known network types with these metrics indicates excellent agreement with intuition and recent experience. The paper concludes with a case study of the Dynamic Spatial Reconstructor (DSR), a processor developed for ultra-high-speed computed tomography. The processor achieves a throughput on the order of 3–5 BIPS by exploiting advanced technology and a specially tailored architecture. Although not a true supersystem (since it is a special purpose system that implements only a few specialized algorithms), the DSR processor exemplifies the approach required for development of supersystems.

Original languageEnglish (US)
Pages (from-to)399-409
Number of pages11
JournalIEEE Transactions on Computers
VolumeC-31
Issue number5
DOIs
StatePublished - May 1982

Keywords

  • Computed tomography
  • computer networks
  • integrated circuit technology
  • network figure of merit
  • supersystems

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

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