@article{fcbde07c251f4c4b9519f1552d4ffe7f,
title = "SEU error signature analysis of Gbit/s SiGe logic circuits using a pulsed laser microprobe",
abstract = "We present, for the first time, an analysis of the error signatures captured during pulsed laser microprobe testing of high-speed digital SiGe logic circuits. 127-bit shift registers, configured using various circuit level latch hardening schemes and incorporated into the circuit for radiation effects self test serve as the primary test vehicle. Our results indicate significant variations in the observed upset rate as a function of strike location and latch architecture. Error information gathered on the sensitive transistor nodes within the latches and characteristic upset durations agree well with recently reported heavy-ion microprobe data. These results support the growing credibility in using pulsed laser testing as a lower-cost alternative to heavy-ion microprobe analysis of sensitive device and circuit nodes, as well as demonstrate the efficiency of the autonomous detection and error approach for high speed bit-error rate testing. Implications for SEU hardening in SiGe are addressed and circuit-level and device-level Radiation Hardening By Design recommendations are made.",
keywords = "Built-in self-test, Circuit level hardening, High-speed bit-error rate testing, Pulsed laser testing, Silicon-germanium (SiGe), Single-event effects (SEU)",
author = "Sutton, {Akil K.} and Ramkumar Krithivasan and Marshall, {Paul W.} and Carts, {Martin A.} and Christina Seidleck and Ray Ladbury and Cressler, {John D.} and Marshall, {Cheryl J.} and Steve Currie and Reed, {Robert A.} and Guofu Niu and Barbara Randall and Karl Fritz and Dale McMorrow and Barry Gilbert",
note = "Funding Information: Manuscript received August 25, 2006. This work was supported by the Defense Threat Reduction Agency (DTRA) under the Radiation Hardened Microelectronics Program, NASA Goddard Space Flight Center (GSFC) under the NASA Electronic Parts and Packaging (NEPP) Program, the NASA SiGe ETDP project, and the Georgia Electronic Design Center (GEDC) at Georgia Tech. A. K. Sutton, R. Krithivasan, and J. D. Cressler are with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30308 USA (e-mail: asutton@ece.gatech.edu). P. W. Marshall is a Consultant in Brookneal, VA 24528 USA. M. A. Carts, C. Seidleck, and R. Ladbury are with Muniz Engineering, Inc., Houston, TX 77058 USA. C. J. Marshall is with NASA-GSFC, Greenbelt, MD 20771 USA. S. Currie, B. Randall, K. Fritz, and B. Gilbert are with the Mayo Clinic, Rochester, MN 55905 USA. R. A. Reed is with Vanderbilt University, Nashville, TN 37235 USA. G. Niu is with Auburn University, Auburn AL 36849 USA. D. McMorrow is with the Naval Research Laboratory, Washington, DC 20375 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TNS.2006.886232",
year = "2006",
month = dec,
doi = "10.1109/TNS.2006.886232",
language = "English (US)",
volume = "53",
pages = "3277--3284",
journal = "IEEE Transactions on Nuclear Science",
issn = "0018-9499",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "6",
}