A Programmable Dynamic Memory Allocation System for Input/Output of Digital Data into Standard Computer Memories at 40 Megasamples/s

Barry K. Gilbert, Martin T. Storma, Keith C. Ballard, Leon W. Hobrock, Carl E. James, Earl H. Wood

Research output: Contribution to journalArticlepeer-review

7 Scopus citations

Abstract

A memory control unit is described, which, operating in conjunction with a special purpose digital computer, achieves real-time storage into and retrieval from computer memory of individual video images undergoing on-line digitization, processing, and reconstitution. The memory control unit is capable of rapid sequential access on up to six 16 K-word core and two 131 K-word (28-bit word) solid-state memories, achieving data transfers to or from ememory at up to 40 million 9-bit samples/s for 33 ms. The memory control unit employs a variety of data rates, and can, under program control, assemble one or more bytes into, or disassemble one or more bytes from, each memory word. The control unit can sign extend incoming data to any of four different byte lengths from any of four different byte lengths. The control unit possesses dual data busses, one dedicated to memory read operations and a second capable of either “reads from” or “writes into” memory. The eight memory modules are sequenced by a small microprogrammed control store loadable from an associated computer. The two data busses have separate control logic and share access to the control store and to the 8 memory modules, permitting both busses to operate on alternate cycles of the 40 MHz system clock, i.e., each at 20 MHz, independently of one another. The division of control permits a variety of image-related real-time multibank memory operations, including retrieval or storage of an image at 40 megasamples/s (MS/s) with samples packed two or three per memory word, or at 20 MS/s with one sample per memory word; simultaneous retrieval of two separate images, or simultaneous retrieval of one image and storage of a second image, each at rates up to 20 MS/s.

Original languageEnglish (US)
Pages (from-to)1101-1109
Number of pages9
JournalIEEE Transactions on Computers
VolumeC-25
Issue number11
DOIs
StatePublished - Nov 1976

Keywords

  • Dual-bus memory access
  • interleaved memory
  • memory access bandwidth
  • operator-programmable memory control
  • real-time data reformatting
  • real-time digital data processing
  • serial data streaming
  • structures

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

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