Abstract
Standard design recommendations for high-speed printed circuit board (PCB) stripline bends are often overly conservative. In this paper, we discuss the measured results from a test board showing that very high numbers of bends are required before significant performance degradation is observed, at which point the resonant frequencies are beyond the frequencies of interest for data rates at or below 10 Gb/s. We continue with detailed guidance for bend utilization at differing signal data rates, number and spacing of the bends, as well as other key parameters. We also introduce a method to de-skew signals within the pin-field to minimize or eliminate the number of jog-outs required due to length mismatch resulting from the combination of pin-pair offset and stripline direction changes such that overall PCB signal routing is simplified.
Original language | English (US) |
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State | Published - Jan 1 2014 |
Event | DesignCon 2014: Where the Chip Meets the Board - Santa Clara, CA, United States Duration: Jan 28 2014 → Jan 31 2014 |
Other
Other | DesignCon 2014: Where the Chip Meets the Board |
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Country/Territory | United States |
City | Santa Clara, CA |
Period | 1/28/14 → 1/31/14 |
ASJC Scopus subject areas
- Computer Graphics and Computer-Aided Design
- Human-Computer Interaction