Low-Power 2K-Cell SDFL Gate Array and DCFL Circuits Using GaAs Self-Aligned E/D MESFET's

Tho T. Vu, Roderick D. Nelson, Gary M. Lee, Peter C.T. Roberts, Kang W. Lee, Stephen K. Swanson, Andrzfj Peczalski, William R. Betten, Steven A. Hanka, Max J. Helix, Eter J. Vold, Gi Young Lee, Stephen A. Jamison, Hristopher A. Arsenault, Susan M. Karwoski, Barbara A. Naused, Barry K. Gilbert, Michael S. Shur

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Engineering & Materials Science