INVESTIGATION OF OPTIMUM INTERCHIP SIGNAL TRANSMISSION PROTOCOLS USING GAAS BFL MSI COMPONENTS WITH VARIOUS I/O PERIPHERIES.

B. K. Gilbert, D. J. Schwab, G. Heimbigner, E. Walton, S. Roosild

Research output: Contribution to conferencePaperpeer-review

Abstract

A study of optimum approaches to the interconnection of high-clock-rate GaAs components on a large circuit board, including the noise environment created thereby, has been undertaken. The authors discuss the design constraints, fabrication, and measured results of two MSI-complexity GaAs integrated circuits, one synchronous and the other asynchronous, designed specifically to investigate the performance strengths and anomalies of interconnected GaAs digital devices. It is expected that circuit tests will result in a set of design rules for large numbers of GaAs integrated circuits operating together in a high-clock-rate subsystem environment.

Original languageEnglish (US)
Pages19-22
Number of pages4
StatePublished - Dec 1 1984

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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