Interconnect analysis for 80-Gbps serial link design

Jonathan Fasig, Gregory Rash, Barbara Randall, Karl Fritz, Steven Currie, Bart McCoy, Paul Riemer, Wendy Wilkins, Barry Gilbert, Erik Daniel

Research output: Contribution to journalArticle

Abstract

This paper presents a case study of the modeling and simulation methods used to design the signal path for a proposed 80-Gbps serial data link between digital systems. This design includes flip-chip transitions from custom IBM 8HP integrated circuits to multilayer organic substrates, with coaxial-cable connections between substrates. Discussion topics include interconnect material selection, detailed 3-D electromagnetic modeling of the conductor transitions and signal paths, time-domain circuit simulation of the complete data path including the driver and receiver, and bit-error rate analysis of the complete link. Simulated data are presented.

Original languageEnglish (US)
Pages (from-to)135-139
Number of pages5
JournalJournal of Microelectronics and Electronic Packaging
Volume5
Issue number3
DOIs
StatePublished - 2008

Keywords

  • Electromagnetic modeling
  • Flip-chip
  • Serial data link

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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  • Cite this

    Fasig, J., Rash, G., Randall, B., Fritz, K., Currie, S., McCoy, B., Riemer, P., Wilkins, W., Gilbert, B., & Daniel, E. (2008). Interconnect analysis for 80-Gbps serial link design. Journal of Microelectronics and Electronic Packaging, 5(3), 135-139. https://doi.org/10.4071/1551-4897-5.3.135