TY - GEN
T1 - Integration of InAs/AlSb/GaSb resonant interband tunneling diodes with heterostructure field-effect transistors for ultra-high-speed digital circuit applications
AU - Fay, P.
AU - Bernstein, G. H.
AU - Chow, D.
AU - Schulman, J.
AU - Mazumder, P.
AU - Williamson, W.
AU - Gilbert, B.
PY - 1999/12/1
Y1 - 1999/12/1
N2 - Resonant tunnelling diode based logic circuits offer significant advantages for low power, ultra-high-speed applications. In this work, a low-power resonant interband tunneling diode (RITD)-based logic technology capable of operating at clock rates of at least 12 GHz is reported. The circuits are fabricated using InAs/AlSb/GaSb RITDs. Fanout of at least two at a clock rate of 10 GHz is also reported for two AND gates in a two-stage pipelined configuration. Simulation results for an RITD/HFET circuit based on measured characteristics of InAs/AlSb/GaSb RITDs and InAs-channel HFETs for a simple inverting Schmitt trigger are presented to demonstrate the advantages of an integrated RITD/HFET technology. This circuit architecture demonstrates proper operation with power supply voltages as low as 0.5 V. In addition, well defined logic levels and abrupt logic transitions are achieved, despite the limited transconductance and large output conductance typical of InAs-channel HFETs.
AB - Resonant tunnelling diode based logic circuits offer significant advantages for low power, ultra-high-speed applications. In this work, a low-power resonant interband tunneling diode (RITD)-based logic technology capable of operating at clock rates of at least 12 GHz is reported. The circuits are fabricated using InAs/AlSb/GaSb RITDs. Fanout of at least two at a clock rate of 10 GHz is also reported for two AND gates in a two-stage pipelined configuration. Simulation results for an RITD/HFET circuit based on measured characteristics of InAs/AlSb/GaSb RITDs and InAs-channel HFETs for a simple inverting Schmitt trigger are presented to demonstrate the advantages of an integrated RITD/HFET technology. This circuit architecture demonstrates proper operation with power supply voltages as low as 0.5 V. In addition, well defined logic levels and abrupt logic transitions are achieved, despite the limited transconductance and large output conductance typical of InAs-channel HFETs.
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M3 - Conference contribution
AN - SCOPUS:0033358498
SN - 0769501044
T3 - Proceedings of the IEEE Great Lakes Symposium on VLSI
SP - 162
EP - 165
BT - Proceedings of the IEEE Great Lakes Symposium on VLSI
PB - IEEE
T2 - Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99)
Y2 - 4 March 1999 through 6 March 1999
ER -