Integration of InAs/AlSb/GaSb resonant interband tunneling diodes with heterostructure field-effect transistors for ultra-high-speed digital circuit applications

P. Fay, G. H. Bernstein, D. Chow, J. Schulman, P. Mazumder, W. Williamson, Barry Kent Gilbert

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Resonant tunnelling diode based logic circuits offer significant advantages for low power, ultra-high-speed applications. In this work, a low-power resonant interband tunneling diode (RITD)-based logic technology capable of operating at clock rates of at least 12 GHz is reported. The circuits are fabricated using InAs/AlSb/GaSb RITDs. Fanout of at least two at a clock rate of 10 GHz is also reported for two AND gates in a two-stage pipelined configuration. Simulation results for an RITD/HFET circuit based on measured characteristics of InAs/AlSb/GaSb RITDs and InAs-channel HFETs for a simple inverting Schmitt trigger are presented to demonstrate the advantages of an integrated RITD/HFET technology. This circuit architecture demonstrates proper operation with power supply voltages as low as 0.5 V. In addition, well defined logic levels and abrupt logic transitions are achieved, despite the limited transconductance and large output conductance typical of InAs-channel HFETs.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE Great Lakes Symposium on VLSI
Place of PublicationLos Alamitos, CA, United States
PublisherIEEE
Pages162-165
Number of pages4
ISBN (Print)0769501044
StatePublished - 1999
Externally publishedYes
EventProceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99) - Ann Arbor, MI, USA
Duration: Mar 4 1999Mar 6 1999

Other

OtherProceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99)
CityAnn Arbor, MI, USA
Period3/4/993/6/99

Fingerprint

Resonant tunneling diodes
Digital circuits
High electron mobility transistors
Networks (circuits)
Clocks
Logic circuits
Transconductance
Electric potential

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Fay, P., Bernstein, G. H., Chow, D., Schulman, J., Mazumder, P., Williamson, W., & Gilbert, B. K. (1999). Integration of InAs/AlSb/GaSb resonant interband tunneling diodes with heterostructure field-effect transistors for ultra-high-speed digital circuit applications. In Proceedings of the IEEE Great Lakes Symposium on VLSI (pp. 162-165). Los Alamitos, CA, United States: IEEE.

Integration of InAs/AlSb/GaSb resonant interband tunneling diodes with heterostructure field-effect transistors for ultra-high-speed digital circuit applications. / Fay, P.; Bernstein, G. H.; Chow, D.; Schulman, J.; Mazumder, P.; Williamson, W.; Gilbert, Barry Kent.

Proceedings of the IEEE Great Lakes Symposium on VLSI. Los Alamitos, CA, United States : IEEE, 1999. p. 162-165.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fay, P, Bernstein, GH, Chow, D, Schulman, J, Mazumder, P, Williamson, W & Gilbert, BK 1999, Integration of InAs/AlSb/GaSb resonant interband tunneling diodes with heterostructure field-effect transistors for ultra-high-speed digital circuit applications. in Proceedings of the IEEE Great Lakes Symposium on VLSI. IEEE, Los Alamitos, CA, United States, pp. 162-165, Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99), Ann Arbor, MI, USA, 3/4/99.
Fay P, Bernstein GH, Chow D, Schulman J, Mazumder P, Williamson W et al. Integration of InAs/AlSb/GaSb resonant interband tunneling diodes with heterostructure field-effect transistors for ultra-high-speed digital circuit applications. In Proceedings of the IEEE Great Lakes Symposium on VLSI. Los Alamitos, CA, United States: IEEE. 1999. p. 162-165
Fay, P. ; Bernstein, G. H. ; Chow, D. ; Schulman, J. ; Mazumder, P. ; Williamson, W. ; Gilbert, Barry Kent. / Integration of InAs/AlSb/GaSb resonant interband tunneling diodes with heterostructure field-effect transistors for ultra-high-speed digital circuit applications. Proceedings of the IEEE Great Lakes Symposium on VLSI. Los Alamitos, CA, United States : IEEE, 1999. pp. 162-165
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