TY - JOUR
T1 - Design and test methodology for an analog-to-digital converter multichip module for experimental all-digital radar receiver operating at 2 Gigasamples/s
AU - Thompson, Rick L.
AU - Amundsen, Eric L.H.
AU - Schaefer, Timothy M.
AU - Riemer, Paul J.
AU - Degerstrom, Michael J.
AU - Gilbert, Barry K.
N1 - Funding Information:
Manuscript received January 22, 1998; revised June 2, 1999. This work was supported in part by the Microsystems Technology Office of the Defense Advanced Research Projects Agency (DARPA/MTO) through Contract N66001-94-C-0051, SPAWAR Systems Center, San Diego, CA.
PY - 1999
Y1 - 1999
N2 - In this paper, we describe the development of an analog-to-digital (A/D) converter subsystem, based on a monolithic A/D converter chip, a demultiplexer chip, and a laminate multichip module, for an experimental all-digital receiver for an airborne radar. The evolution of techniques for recording and analyzing all the data from the assembled multichip module at the full sample rate of the A/D converter, and the ways in which this test data can be used to analyze the performance of A/D converters, are described. The problems which arise in the testing of GHz A/D converters, a number of which are unique to A/D conversion at such high sample rates, are pointed out. Finally, comments on future directions in the test of high performance A/D converters are presented.
AB - In this paper, we describe the development of an analog-to-digital (A/D) converter subsystem, based on a monolithic A/D converter chip, a demultiplexer chip, and a laminate multichip module, for an experimental all-digital receiver for an airborne radar. The evolution of techniques for recording and analyzing all the data from the assembled multichip module at the full sample rate of the A/D converter, and the ways in which this test data can be used to analyze the performance of A/D converters, are described. The problems which arise in the testing of GHz A/D converters, a number of which are unique to A/D conversion at such high sample rates, are pointed out. Finally, comments on future directions in the test of high performance A/D converters are presented.
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U2 - 10.1109/6040.803458
DO - 10.1109/6040.803458
M3 - Article
AN - SCOPUS:0033349071
SN - 1521-3323
VL - 22
SP - 649
EP - 664
JO - IEEE Transactions on Advanced Packaging
JF - IEEE Transactions on Advanced Packaging
IS - 4
ER -