DESIGN AND FABRICATION OF A DIGITAL RF MEMORY USING CUSTOM DESIGNED GAAS INTEGRATED CIRCUITS.

Barry K. Gilbert; Daniel J. Schwab; Lester M. Pastuszyn; Allen Firstenberg; Robert H. Evans

DESIGN AND FABRICATION OF A DIGITAL RF MEMORY USING CUSTOM DESIGNED GAAS INTEGRATED CIRCUITS.

Barry K. Gilbert, Daniel J. Schwab, Lester M. Pastuszyn, Allen Firstenberg, Robert H. Evans

Physiology & Biomedical Engineering

Research output: Contribution to conference › Paper › peer-review

8 Scopus citations

Abstract

The design constraints encountered during the implementation of a mixed gallium arsenide/silicon ECL digital RF memory (DRFM) are described. This unit, which is configured to digitize an analog signal at 1 GHz rates, has served as a test bed for ten separate designs for the high clock rate front and back ends of the DRFM system. Preliminary test results from the GaAs components are presented and discussed.

Original language	English (US)
Pages	173-176
Number of pages	4
State	Published - 1985

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

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title = "DESIGN AND FABRICATION OF A DIGITAL RF MEMORY USING CUSTOM DESIGNED GAAS INTEGRATED CIRCUITS.",

abstract = "The design constraints encountered during the implementation of a mixed gallium arsenide/silicon ECL digital RF memory (DRFM) are described. This unit, which is configured to digitize an analog signal at 1 GHz rates, has served as a test bed for ten separate designs for the high clock rate front and back ends of the DRFM system. Preliminary test results from the GaAs components are presented and discussed.",

author = "Gilbert, {Barry K.} and Schwab, {Daniel J.} and Pastuszyn, {Lester M.} and Allen Firstenberg and Evans, {Robert H.}",

year = "1985",

language = "English (US)",

pages = "173--176",

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T1 - DESIGN AND FABRICATION OF A DIGITAL RF MEMORY USING CUSTOM DESIGNED GAAS INTEGRATED CIRCUITS.

AU - Gilbert, Barry K.

AU - Schwab, Daniel J.

AU - Pastuszyn, Lester M.

AU - Firstenberg, Allen

AU - Evans, Robert H.

PY - 1985

Y1 - 1985

N2 - The design constraints encountered during the implementation of a mixed gallium arsenide/silicon ECL digital RF memory (DRFM) are described. This unit, which is configured to digitize an analog signal at 1 GHz rates, has served as a test bed for ten separate designs for the high clock rate front and back ends of the DRFM system. Preliminary test results from the GaAs components are presented and discussed.

AB - The design constraints encountered during the implementation of a mixed gallium arsenide/silicon ECL digital RF memory (DRFM) are described. This unit, which is configured to digitize an analog signal at 1 GHz rates, has served as a test bed for ten separate designs for the high clock rate front and back ends of the DRFM system. Preliminary test results from the GaAs components are presented and discussed.

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M3 - Paper

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ER -

DESIGN AND FABRICATION OF A DIGITAL RF MEMORY USING CUSTOM DESIGNED GAAS INTEGRATED CIRCUITS.

Abstract

ASJC Scopus subject areas

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