A Parameterized and Minimal Resource Soft Processor for Programmable Logic

Christopher L. Felton, Barry K. Gilbert, Clifton R. Haider

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Incorporating a soft processor in a programmable logic system, e.g. a field programmable gate array (FPGA), often requires using a substantial percentage of the logic cells (LC), notably on low-power devices. In this work we present a 32-bit RISC-V soft processor design that uses a serial arithmetic logic unit (ALU). The design can be configured to use less than 5% of the LC resources in a 5K LC low-power FPGA device. Small occupancy soft processors enable complex control and ancillary support to the principal processing and transport paths.

Original languageEnglish (US)
Title of host publicationConference Record - 53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019
EditorsMichael B. Matthews
PublisherIEEE Computer Society
Pages1601-1605
Number of pages5
ISBN (Electronic)9781728143002
DOIs
StatePublished - Nov 2019
Event53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019 - Pacific Grove, United States
Duration: Nov 3 2019Nov 6 2019

Publication series

NameConference Record - Asilomar Conference on Signals, Systems and Computers
Volume2019-November
ISSN (Print)1058-6393

Conference

Conference53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019
CountryUnited States
CityPacific Grove
Period11/3/1911/6/19

Keywords

  • FPGA
  • Low power
  • Programmable logic
  • RISC-V
  • Sensor-hub
  • Serial ALU
  • Soft processor

ASJC Scopus subject areas

  • Signal Processing
  • Computer Networks and Communications

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  • Cite this

    Felton, C. L., Gilbert, B. K., & Haider, C. R. (2019). A Parameterized and Minimal Resource Soft Processor for Programmable Logic. In M. B. Matthews (Ed.), Conference Record - 53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019 (pp. 1601-1605). [9048878] (Conference Record - Asilomar Conference on Signals, Systems and Computers; Vol. 2019-November). IEEE Computer Society. https://doi.org/10.1109/IEEECONF44664.2019.9048878