A comparison of SEU tolerance in high-speed SiGe HBT digital logic designed with multiple circuit architectures

Physics & Astronomy

• single event upsets 100%
• bipolar transistors 76%
• logic 68%
• heterojunctions 62%
• high speed 53%
• flip-flops 37%
• vulnerability 19%
• cross coupling 19%
• emitters 11%
• transistors 11%
• output 8%
• cells 7%
• performance 6%
• simulation 5%

Engineering & Materials Science

• Heterojunction bipolar transistors 83%
• Flip flop circuits 55%
• Networks (circuits) 38%
• Space applications 26%
• Circuit simulation 26%
• Transistors 20%