A 35 GS/s 5-bit SiGe BiCMOS flash ADC with offset corrected exclusive-or comparator

R. A. Kertis, J. S. Humble, M. A. Daun-Lindberg, R. A. Philpott, K. A. Fritz, D. J. Schwab, J. F. Prairie, B. K. Gilbert, E. S. Daniel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Scopus citations

Abstract

The design and wafer probe test results of a 5-bit SiGe ADC are presented. The integrated circuit, fabricated in a 200/250 GHz fT/F max, SiGe BiCMOS technology, provides a 5-bit analog to digital conversion with input tone frequencies up to 20 GHz and sampling clock rates up to 35 GS/s. The ADC makes use of a comparator with an integrated exclusive- or function to reduce power consumption. The device also generates two half-rate interleaved outputs to ease in data capturing with laboratory equipment. An effective number of bits (ENOB) of nearly 5.0 is achieved for low frequency input tones, dropping to 4.0 at 10 GHz.

Original languageEnglish (US)
Title of host publication2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting
Pages252-255
Number of pages4
DOIs
StatePublished - Dec 31 2008
Event2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - Monterey, CA, United States
Duration: Oct 13 2008Oct 15 2008

Publication series

NameProceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting
ISSN (Print)1088-9299

Other

Other2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting
CountryUnited States
CityMonterey, CA
Period10/13/0810/15/08

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Kertis, R. A., Humble, J. S., Daun-Lindberg, M. A., Philpott, R. A., Fritz, K. A., Schwab, D. J., Prairie, J. F., Gilbert, B. K., & Daniel, E. S. (2008). A 35 GS/s 5-bit SiGe BiCMOS flash ADC with offset corrected exclusive-or comparator. In 2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (pp. 252-255). [4662755] (Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting). https://doi.org/10.1109/BIPOL.2008.4662755