A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS

R. A. Philpott, J. S. Humble, R. A. Kertis, K. E. Fritz, B. K. Gilbert, E. S. Daniel

Research output: Contribution to journalConference article

21 Scopus citations

Abstract

The design and wafer probe test results of a 20Gb/s Source-Series Terminated SerDes transmitter are presented. The integrated circuit, fabricated in a 65nm bulk CMOS technology, transmits pre-emphasized data through the use of a 4-tap feed-forward equalizer. Transmitter output impedance is adjustable from 45 to 55 ohms. A power consumption of 167mW at 1.1V was measured at a transmit rate of 20Gb/s.

Original languageEnglish (US)
Article number4672163
Pages (from-to)623-626
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
DOIs
StatePublished - Dec 26 2008
EventIEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States
Duration: Sep 21 2008Sep 24 2008

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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