A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS

R. A. Philpott, J. S. Humble, R. A. Kertis, K. E. Fritz, Barry Kent Gilbert, E. S. Daniel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

21 Scopus citations

Abstract

The design and wafer probe test results of a 20Gb/s Source-Series Terminated SerDes transmitter are presented. The integrated circuit, fabricated in a 65nm bulk CMOS technology, transmits pre-emphasized data through the use of a 4-tap feed-forward equalizer. Transmitter output impedance is adjustable from 45 to 55 ohms. A power consumption of 167mW at 1.1V was measured at a transmit rate of 20Gb/s.

Original languageEnglish (US)
Title of host publicationProceedings of the Custom Integrated Circuits Conference
Pages623-626
Number of pages4
DOIs
StatePublished - 2008
EventIEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States
Duration: Sep 21 2008Sep 24 2008

Other

OtherIEEE 2008 Custom Integrated Circuits Conference, CICC 2008
CountryUnited States
CitySan Jose, CA
Period9/21/089/24/08

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Philpott, R. A., Humble, J. S., Kertis, R. A., Fritz, K. E., Gilbert, B. K., & Daniel, E. S. (2008). A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS. In Proceedings of the Custom Integrated Circuits Conference (pp. 623-626). [4672163] https://doi.org/10.1109/CICC.2008.4672163