A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS

R. A. Philpott; J. S. Humble; R. A. Kertis; K. E. Fritz; B. K. Gilbert; E. S. Daniel

doi:10.1109/CICC.2008.4672163

A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS

R. A. Philpott, J. S. Humble, R. A. Kertis, K. E. Fritz, B. K. Gilbert, E. S. Daniel

Physiology & Biomedical Engineering

Research output: Contribution to journal › Conference article › peer-review

22 Scopus citations

Abstract

The design and wafer probe test results of a 20Gb/s Source-Series Terminated SerDes transmitter are presented. The integrated circuit, fabricated in a 65nm bulk CMOS technology, transmits pre-emphasized data through the use of a 4-tap feed-forward equalizer. Transmitter output impedance is adjustable from 45 to 55 ohms. A power consumption of 167mW at 1.1V was measured at a transmit rate of 20Gb/s.

Original language	English (US)
Article number	4672163
Pages (from-to)	623-626
Number of pages	4
Journal	Proceedings of the Custom Integrated Circuits Conference
DOIs	https://doi.org/10.1109/CICC.2008.4672163
State	Published - Dec 26 2008
Event	IEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States Duration: Sep 21 2008 → Sep 24 2008

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/CICC.2008.4672163

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title = "A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS",

abstract = "The design and wafer probe test results of a 20Gb/s Source-Series Terminated SerDes transmitter are presented. The integrated circuit, fabricated in a 65nm bulk CMOS technology, transmits pre-emphasized data through the use of a 4-tap feed-forward equalizer. Transmitter output impedance is adjustable from 45 to 55 ohms. A power consumption of 167mW at 1.1V was measured at a transmit rate of 20Gb/s.",

author = "Philpott, {R. A.} and Humble, {J. S.} and Kertis, {R. A.} and Fritz, {K. E.} and Gilbert, {B. K.} and Daniel, {E. S.}",

year = "2008",

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doi = "10.1109/CICC.2008.4672163",

language = "English (US)",

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journal = "Proceedings of the Custom Integrated Circuits Conference",

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T1 - A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS

AU - Philpott, R. A.

AU - Humble, J. S.

AU - Kertis, R. A.

AU - Fritz, K. E.

AU - Gilbert, B. K.

AU - Daniel, E. S.

PY - 2008/12/26

Y1 - 2008/12/26

N2 - The design and wafer probe test results of a 20Gb/s Source-Series Terminated SerDes transmitter are presented. The integrated circuit, fabricated in a 65nm bulk CMOS technology, transmits pre-emphasized data through the use of a 4-tap feed-forward equalizer. Transmitter output impedance is adjustable from 45 to 55 ohms. A power consumption of 167mW at 1.1V was measured at a transmit rate of 20Gb/s.

AB - The design and wafer probe test results of a 20Gb/s Source-Series Terminated SerDes transmitter are presented. The integrated circuit, fabricated in a 65nm bulk CMOS technology, transmits pre-emphasized data through the use of a 4-tap feed-forward equalizer. Transmitter output impedance is adjustable from 45 to 55 ohms. A power consumption of 167mW at 1.1V was measured at a transmit rate of 20Gb/s.

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EP - 626

JO - Proceedings of the Custom Integrated Circuits Conference

JF - Proceedings of the Custom Integrated Circuits Conference

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Y2 - 21 September 2008 through 24 September 2008

ER -

A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm Bulk CMOS

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